General PCB Routing Techniques

For traces that don't need specific impedance or high current, a 10 mil trace width is fine for the vast majority of low-current analog and digital signals. Printed circuit board traces that carry more than 0.3 A may need to be wider.

 Route the signal in a daisy chain.

Do not route the signal over split planes

Avoid plane obstruction (slot) whenever possible. If routing over them is unavoidable, use stitching capacitors.

Add dedicated ground vias close to the source and sink of the signal.

Do not use right-angle traces.

Transition vias to pads, notably between thin and thick traces on the output pins. The teardrop approach reduces thermal stress during the signal transition. This procedure prevents traces from cracking and increases their mechanical strength.

Route traces in parallel pairs when routing around an object to avoid differential impedance and discontinuities caused by split traces

Place passive components within the signal path, such as source-matching resistors or ac-coupling  capacitors, and next to each other. Placing components in parallel creates wider traces spacing. Staggering components is not recommended as it creates narrow areas.

Avoid the route entry to pad which could cause component shiftting during reflow due to solder pull.

Avoid introducing bends into high-speed differential signals. Maintain a bend angle of more than 135° to achieve the loosest bend feasible. Consider the high-speed signal bending rule as shown below.

Try to increase the spacing between traces whenever possible

Vias cause a significant discontinuity in impedance. Try to keep the number of placed vias to a minimum and put them symmetrically.

It is preferred to route all of the data and clock signals on the same layer.

Voids in reference planes can occur when vias are placed close to together. Be aware of such voids when routing high-speed signals. To avoid large void areas, ensure appropriate space between vias. Sometimes it is preferable to place fewer ground and power vias in order to eliminate via voids.

The return path must be considered at both the signal's source and sink. The left figure below depicts a poor example. Because there is only one ground route on the source side, the return current cannot go back over the reference ground plane as intended. The top layer's ground connection serves as the current's return channel. The difficulty is that the signal trace's impedance is calculated with reference to the ground plane rather than the ground trace on the top layer. As a result, ground vias must be placed on both the source and sink sides of the signal. This allows the return current to travel back along the ground plane.

What is Encroached Vias?

The encroached via concept is one that uses soldermask on the bottom via pad without filling the via’s plated-through hole. Encroachment-type vias have the top-side soldermask open and the bottom-side soldermask opening adjusted, so that it is slightly larger than the via hole size (typically +0.06 mm).

If the mask is opened all the way around an EPAD via (OPEN via), then solder can flow out from under the QFN EPAD onto the bottom-side via pad as a big drop. This drop often drips off during the motion of the unit through the reflow oven, pulling solder from the EPAD joint. This solder “scavenging” can render the EPAD connection unreliable and/or cause the device to tilt, resulting in unreliable pin connections.

Encroached via can be created in Altium Design by defining Solder Mask Expansion setting with negative values as below. For best result, via with and Finished hole size, FHS of 0.25 to 0.3mm and bottom-side soldermask opening of 0.055 mm to 0.075mm larger than the FHS.

Making your own PCB by Etching method

1) Artwork Printing: 

Print your artwork on a transparent sheet.

2) Exposing:

Kinsten Presensitized PCB is used for this prototype as it is low-cost and easy to work. Remove the light-proof protective film and expose the board in the Kinsten UV exposure box for 90 seconds.
Align the artwork with the PCB inside the vacuum clamp, and leave it inside the exposure box for about 5 minutes.

3) Developing:

A sachet of DP-50 developer is mixed with 1 liter of 25°C water in a plastic container. The exposed PCB is gently agitated in solution. The exposed areas of resist will dissolve into the solution, leaving the green resist in areas that were not exposed to UV light as below.

4) Etching:

Etching copper is done in the Kinsten Etching Tank for 4 to 10 minutes. Pour enough etching solution (Ferric Chloride or Ammonium Persulphate) into the tank and immerse the board. Use the air pump to allow the etchant to be bubble agitated until the unwanted copper foil is etched away, only the circuit patterns are left. Rinse the board with plenty of water.

Remember “Safety First” always wear rubber gloves and protective eyewear when working with this etching compound. Once you've etched your board, the leftover solution should not pour down the drain (legally). Take it to a hazardous waste facility.

Here is the final outcome. For better results, make PCB trace thickness at least 10 or 12 mils and leave a wider gap between trace and GND copper pour.

Design for manufacturing or DFM

Design for Manufacturability rules and guidelines are a collection of PCB design best practices to help our design be as easily manufacturable as possible. The easier it is to manufacture a PCB, the more likely it will be to reduce both manufacturing errors and costs. DFM rules have been developed by PCB manufacturing experts and the rules will vary depending on the board design, and the manufacturer's capabilities.

It is highly recommended to check with the PCB manufacturer for their precision and limit on the width of the solder mask Dam. Solder mask dam between surface mount pads will prevent solder bridging during assembly. Below is one of the PCB suppliers' capabilities.

In summary, the width of the solder mask dam depends on the copper thickness and solder mask color. Generally, 3 mils of solder mask dam can be achieved using 1oz of copper but that will be 6 mils for 2 oz of copper. Similarly, the minimum solder mask dam for the Green solder mask is 3 mil and others will be 5 mil.

To get a solder mask dam between pads (if individual relief is required) spacing between copper should be 8 mils or more. Otherwise, the finished PCB will get block relief without a solder mask dam.

PCB under microscope with and without solder mask dam can be seen in the photo below.